The Eternal Thing

     They were the B. Tech days, and we were taught about Verilog and VHDL programming languages. Obviously, learning the syntax was never enough. We need to use it - have to write programs.      As it is a hardware language, we need to develop the codes for electronic blocks. Starting with trivial ones like AND gates, and OR gates and going up to priority encoder, kind of blocks.     However, we are taught that that was not enough. We need to code another part, which is called "testbench."  We were given a few examples of the test benches for some blocks. Honestly, the testbench part looked almost the same for all the designs. We simply concluded that the test bench was easier to code than the design part.     Cut to the training period in the initial days of the core company. The good news is that the hardware languages we were taught and that the companies use are almost similar, even though that is not enough. After the basic tr...

Hello,  You have been heard of sudoku as a great puzzle where we have to place numbers in a square using the rules - like unique row, unique column, and unique sub-square... What about solving it just like that? Yeah, you can now automate the sudoku using the hardware language - "SystemVerilog"...! SystemVerilog is a hardware language to program the electronic circuits and to test them as well - The other hardware language are Verilog and VHDL (You can refer here a brief tabulated version of differences between all the three here ) SystemVerilog is like an updated version of Verilog; Hence, in industry VHDL or SystemVerilog are preferred to Verilog... Okay, how SystemVerilog helps to solve Sudoku? In the SystemVerilog, there is a feature to randomize the given values; but that's not yet - we can control the randomization with a feature called  "Constraints" Briefly, these constraints help the randomization stick to given conditions, like:- 1. The values should b...